Impact of multi-Vt technique in eliminating thermal runaway during testing of 3D chips
Potluri, S and Trinadh, A Satya and Sobhan Babu, Ch and Singh, Shiv Govind and Kamakoti, V (2015) Impact of multi-Vt technique in eliminating thermal runaway during testing of 3D chips. In: Design Automation and Test in Europe,3D workshop, IEEE, 2015, Grenoble, France.
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Item Type: | Conference or Workshop Item (Paper) | ||||||
Subjects: | Electrical Engineering | ||||||
Divisions: | Department of Electrical Engineering | ||||||
Depositing User: | Team Library | ||||||
Date Deposited: | 27 Jun 2019 05:18 | ||||||
Last Modified: | 27 Jun 2019 05:18 | ||||||
URI: | http://raiithold.iith.ac.in/id/eprint/5567 | ||||||
Publisher URL: | |||||||
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