Torque Ripple Minimization of PPMIM Drives with Phase-Shifted Carrier PWM

B, Prathap Reddy and K, Siva Kumar (2018) Torque Ripple Minimization of PPMIM Drives with Phase-Shifted Carrier PWM. In: 44th Annual Conference of the IEEE Industrial Electronics Society, 21-23 October 2018, USA.

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Abstract

The interest on Multiphase induction motor drives with pole-phase modulation is intensifying in traction, ship propulsion and electrical vehicles applications due to their potential benefits over the three phase induction motor drives. However, in PPM the number of poles and phase are varied in a perpetual manner for attaining the wider speed and torque characteristics. For meeting the high torque requirement of these applications poles has to be increased in PPM. This increment in number of poles leads to higher magnitude of space harmonics in airgap that intensifies the torque pulsations. To address this, carrier phase shifted SVPWM (CPS-SVPWM) is proposed in this paper. For supplying the multilevel voltage across effective phase the carriers of equal voltage profile windings are displaced by an angle of 120°. This CPS-SVPWM cancels the lower center band harmonics and the remaining side bands are shifted to 6 times of the carrier frequency. In this way, the time harmonics in the airgap are reduced by supplying the multilevel voltage. The aim is to give an optimal phase shift angle between the carriers to get the better performance of the PPMIM drive. Moreover, the dc-link voltage utilization (DL VU) is improved by the 15.4 % in both pole- phase combinations with phase groping concept. The performance of the PPMIM drive with 60° and 120° CPS-SVPWMs are compared w.r.t their pros and cons. The proposed 120° CPS-SVPWM concept is executed with Maxwell 2-D finite analysis (FEM analysis) by implementing a 5hp PPMIM FEM model. Further the efficacy of this concept is validated by using laboratory porotype of 9-phase 5hp PPMIM drive. The PPMIM drive is controlled with SPARTAN-6 FPGA board, where the switching algorithm is written using VHDL.

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