DBVal: Validating P4 Data Plane Runtime Behavior
Kumar, K Shiv and K, Ranjitha and Prashanth, P S and Arashloo, Mina Tahmasbi and U., Venkanna and Tammana, Praveen (2021) DBVal: Validating P4 Data Plane Runtime Behavior. In: 2021 ACM SIGCOMM Symposium on SDN Research, SOSR 2021, 20 September 2021 through 21 September 2021, Virtual, Online.
Text
SOSR_2021.pdf - Published Version Restricted to Registered users only Download (2MB) | Request a copy |
Abstract
The P4 software ecosystem to operate programmable data planes is increasingly becoming complex. The packet-processing behavior is defined by several components: the P4 program, the compiler that maps P4 programs to resource-constrained switch pipeline, the control-plane program that installs rules, and the switch software agents that configure the data plane. Bugs in any one or more of these components would potentially introduce packet-processing errors in the data plane. Prior work verifies P4 programs before deployment and found many program bugs. But bugs can happen in other components after the program deployment and may not be found during testing and only manifest themselves in production. In this work, our goal is to detect packet-processing errors induced by bugs that are not caught (or are difficult to catch) before the P4 program deployment. Our key idea is to let P4 programmers specify the intended packet-processing behavior and validate the actual packet-processing behavior against the intended behavior at runtime. We obtain intended behavior from the P4 programmers in the form of assertions, where each assertion specifies which tables and actions should be applied and in what order on a certain subset of traffic. Next, the assertions are compiled and translated to P4 implementation such that the implementation efficiently tracks the packet execution path, that is, the set of tables applied and actions executed, and then validates the tracked behavior at line rate. We show that our techniques can be used to effectively detect bugs that are difficult, if not impossible, to catch with existing techniques for testing and verifying programmable data planes. © 2021 ACM.
IITH Creators: |
|
||||
---|---|---|---|---|---|
Item Type: | Conference or Workshop Item (Paper) | ||||
Additional Information: | We thank the shepherd of our paper, Andreas Voellmy, and the anonymous reviewers for their thoughtful feedback. The paper writing has improved substantially by addressing their comments. We also thank Jennifer Rexford, Suriya Kodeshwaran, Harish S A, for their valuable feedback on the earlier drafts and for their participation in the discussions. This work is supported by a startup grant awarded by IIT Hyderabad and a fellowship by DST NM-ICPS TiHAN. | ||||
Uncontrolled Keywords: | Bug Detection; Programmable Data Planes; Runtime Validation; Software-Defined Networks | ||||
Subjects: | Computer science | ||||
Divisions: | Department of Computer Science & Engineering | ||||
Depositing User: | . LibTrainee 2021 | ||||
Date Deposited: | 16 Aug 2022 04:40 | ||||
Last Modified: | 16 Aug 2022 04:40 | ||||
URI: | http://raiithold.iith.ac.in/id/eprint/10174 | ||||
Publisher URL: | http://doi.org/10.1145/3482898.3483352 | ||||
Related URLs: |
Actions (login required)
View Item |
Statistics for this ePrint Item |