Browse by IITH Authors

Prashant, Kumar and Nayak, Kaushik (2022) Contact Analysis of Elemental Transition Metal Electrodes for Complementary 2D-FET Applications Using MoS2 and WSe2. IEEE Electron Device Letters, 43 (7). pp. 1137-1140. ISSN 0741-3106

Pullaiah, Yerragudi and Bajaj, Mohit and Badami, O. and Nayak, Kaushik (2022) TCAD Analysis of O-Terminated Diamond m-i-p+ Diode Characteristics Dependencies on Surface States CNL and Metal-Induced Gap States. IEEE Transactions on Electron Devices, 69 (1). pp. 271-277. ISSN 0018-9383

Sudarsanan, Akhil and Nayak, Kaushik (2021) Immunity to random fluctuations induced by interface trap variability in Si gate-all-around n-nanowire field-effect transistor devices. Journal of Computational Electronics, 20 (3). pp. 1169-1177. ISSN 1569-8025

Venkateswarlu, Sankatali and Badami, Oves and Nayak, Kaushik (2021) Electro-Thermal Performance Boosting in Stacked Si Gate-All-Around Nanosheet FET With Engineered Source/Drain Contacts. IEEE Transactions on Electron Devices. pp. 1-6. ISSN 0018-9383

Prashant, Kumar and Gupta, Dinesh and Pullaiah, Yerragudi and Badami, Oves and Nayak, Kaushik (2021) Electrode Orientation Dependent Transition Metal—(MoS₂; WS₂) Contact Analysis for 2D Material Based FET Applications. IEEE Electron Device Letters, 42 (12). pp. 1878-1881. ISSN 0741-3106

Sudarsanan, Akhil and Badami, Oves and Nayak, Kaushik (2021) Superior Interface Trap Variability Immunity of Horizontally Stacked Si Nanosheet FET in Sub-3-nm Technology Node. In: 44th International Semiconductor Conference, CAS 2021, 6 October 2021through 8 October 2021, Virtual, Online.

Sudarsanan, Akhil and Nayak, Kaushik (2021) TCAD-Based Investigation of Statistical Variability Immunity in U-Channel FDSOI n-MOSFET for Sub-7-nm Technology. IEEE Transactions on Electron Devices, 68 (6). pp. 2611-2617. ISSN 0018-9383

Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Hetero-Interfacial Thermal Resistance Effects on Device Performance of Stacked Gate-All-Around Nanosheet FET. IEEE Transactions on Electron Devices, 67 (10). pp. 4493-4499. ISSN 0018-9383

Sudarsanan, Akhil and Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Superior Work Function Variability Performance of Horizontally Stacked Nanosheet FETs for Sub-7-nm Technology and Beyond. In: 4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings, 6 - 21 April 2020, Penang.

Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si CMOS Logic Circuit Performance in N-14 to N-7 Scaled Technologies. IEEE Transactions on Electron Devices, 67 (4). pp. 1530-1536. ISSN 0018-9383

Prashant, Kumar and Yerragudi, Pullaiah and Gupta, Dinesh and Nayak, Kaushik (2020) Atomistic Modeling to Engineer Ohmic Contacts between Monolayer MoS2 and Transition Metals. In: 2020 IEEE International Interconnect Technology Conference, IITC 2020, 5 October 2020through 9 October 2020, Virtual, San Jose.

Pullaiah, Y and Emani, Naresh Kumar and Nayak, Kaushik (2020) Device Electrostatics and High Temperature Operation of Oxygen Terminated Boron Doped Diamond MOS Capacitor and MOSFET. In: 4th IEEE Electron Devices Technology and Manufacturing (EDTM) Conference, 16 – 18 March 2020, Penang, Malaysia.

Pullaiah, Yerragudi and Emani, Naresh Kumar and Nayak, Kaushik (2020) Device Electrostatics and High Temperature Operation of Oxygen Terminated Boron Doped Diamond MOS Capacitor and MOSFET. In: 4th Electron Devices Technology and Manufacturing Conference, EDTM 2020 - Proceedings, 6 April 2020 - 21 April 2020, Penang.

Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Device SHEs in the Presence of Non-equilibrium Channel Heat Transport in SOI and SOD FinFETs with Technology Scaling. In: 5th IEEE International Conference on Emerging Electronics, ICEE 2020, 26 November 2020through 28 November 2020, New Delhi.

Sudarsanan, Akhil and Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Superior Work Function Variability Performance of Horizontally Stacked Nanosheet FETs for Sub-7-nm Technology and Beyond. In: 4th IEEE Electron Devices Technology and Manufacturing (EDTM) Conference, 16 – 18 March 2020, Penang, Malaysia.

Gupta, Dinesh and Venkateswarlu, Sankatali and Badami, Oves and Nayak, Kaushik (2020) THz Device Design for SiGe HBT under Sub-room Temperature to Cryogenic Conditions. In: 5th IEEE International Conference on Emerging Electronics, ICEE 2020, 26 - 28 November 2020, New Delhi.

Sudarsanan, Akhil and Venkateswarlu, Sankatali and Nayak, Kaushik (2019) Impact of Fin Line Edge Roughness and Metal Gate Granularity on Variability of 10-nm Node SOI n-FinFET. IEEE Transactions on Electron Devices, 66 (11). pp. 4646-4652. ISSN 0018-9383

Venkateswarlu, Sankatali and Sudarsanan, Akhil and Nayak, Kaushik (2019) Impact of Phonon Boundary Scattering on Self-heating Effects in Stacked Si Nano-sheet FET in sub-7nm Logic Technologies. In: XXth International Workshop on the Physics of Semiconductor Devices (IWPSD), 17-20 December 2019, Kolkata, India. (Submitted)

Tapar, Jinal and Kishen, Saurabh and Emani, Naresh Kumar and et al, . (2019) Impact of p-doping, strain and surface recombination on optical gain in GaAs nanocylinders. arXiv.org.

Venkateswarlu, Sankatali and Sudarsanan, Akhil and Nayak, Kaushik (2019) Improved Electro-Thermal Performance in FinFETs using SOD Technology for 7nm node High Performance Logic Devices. In: International Conference on Solid State Devices and Materials, 2 - 5 September 2019, Nagoya University, Japan.

Tapar, Jinal and Kisen, Saurabh and Nayak, Kaushik and et al, . (2019) Optimizing the Gain in Semiconductor Nanostructures for All-dielectric Active Metamaterial Applications. In: 10th International Conference on Materials for Advanced Technologies (ICMAT), 23 to 28 June 2019, Singapore.

Sankatali, Venkateswarlu and Sudarsanan, Akhil and Singh, Shiv Govind and Nayak, Kaushik (2018) Ambient Temperature-Induced Device Self-Heating Effects on Multi-Fin Si n-FinFET Performance. IEEE Transactions on Electron Devices, 65 (7). pp. 2721-2728. ISSN 0018-9383

Pushkar, Dasika and Nayak, Kaushik (2018) Modeling and Simulation of Negative Capacitance MOSFETs. Masters thesis, Indian Institute of Technology Hyderabad.

Bhukya, Sardar and Nayak, Kaushik (2018) Numerical device simulations of ionizing radiation effects on CMOS logic device performance. Masters thesis, Indian Institute of Technology Hyderabad.

Bajaj, M and Nayak, Kaushik and Gundapaneni, S and Rao, V R (2016) Effect of Metal Gate Granularity Induced Random Fluctuations on Si Gate-All-Around Nanowire MOSFET 6-T SRAM Cell Stability. IEEE Transactions on Nanotechnology. pp. 1-4. ISSN 1536-125X