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Number of items: 9.

Badami, Oves (2023) Lateral P–N Junction Photodiodes Using Lateral Polarity Structure GaN Films: A Theoretical Perspective. Journal of Electronic Materials, 52 (3). pp. 2148-2157. ISSN 0361-5235

Gauhar, Ghulam Ali and Chenchety, Abhishek and Yenugula, Hashish and Georgiev, Vihar and Asenov, Asen and Badami, Oves (2022) Study of gate current in advanced MOS architectures. Solid-State Electronics, 194. pp. 1-4. ISSN 0038-1101

Venkateswarlu, S. and Badami, O. and Nayak, K. (2021) Electro-Thermal Performance Boosting in Stacked Si Gate-all-Around Nanosheet FET with Engineered Source/Drain Contacts. IEEE Transactions on Electron Devices, 68 (9). pp. 4723-4728. ISSN 00189383

Ding, J. and Mu, D. and Badami, O. and et al, . (2021) KMC-based POM flash cell optimization and time-dependent performance investigation. Semiconductor Science and Technology, 36 (7). ISSN 02681242

Venkateswarlu, Sankatali and Badami, Oves and Nayak, Kaushik (2021) Electro-Thermal Performance Boosting in Stacked Si Gate-All-Around Nanosheet FET With Engineered Source/Drain Contacts. IEEE Transactions on Electron Devices. pp. 1-6. ISSN 0018-9383

Prashant, Kumar and Gupta, Dinesh and Pullaiah, Yerragudi and Badami, Oves and Nayak, Kaushik (2021) Electrode Orientation Dependent Transition Metal—(MoS₂; WS₂) Contact Analysis for 2D Material Based FET Applications. IEEE Electron Device Letters, 42 (12). pp. 1878-1881. ISSN 0741-3106

Sudarsanan, Akhil and Badami, Oves and Nayak, Kaushik (2021) Superior Interface Trap Variability Immunity of Horizontally Stacked Si Nanosheet FET in Sub-3-nm Technology Node. In: 44th International Semiconductor Conference, CAS 2021, 6 October 2021through 8 October 2021, Virtual, Online.

Badami, Oves and Sadi, Toufik and Adamu-Lema, Fikru and et al, . (2020) A Kinetic Monte Carlo Study of Retention Time in a POM Molecule-Based Flash Memory. IEEE Transactions on Nanotechnology, 19. pp. 704-710. ISSN 1536-125X

Gupta, Dinesh and Venkateswarlu, Sankatali and Badami, Oves and Nayak, Kaushik (2020) THz Device Design for SiGe HBT under Sub-room Temperature to Cryogenic Conditions. In: 5th IEEE International Conference on Emerging Electronics, ICEE 2020, 26 - 28 November 2020, New Delhi.

This list was generated on Wed Dec 25 12:16:54 2024 IST.