Bhardwaj, Swati and Acharyya, Amit
(2019)
Resource Constrained Architecture Design for nD Single Channel Independent Component Analysis.
PhD thesis, Indian Institute of Technology Hyderabad.
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Abstract
Emerging applications in the field of biomedical signal processing, wireless sensor networks, audio processing, and brain computer interfacing require sophisticated signal processing algorithms for signal separation and their efficient hardware implementation with limited resources. Signal separation is the main signal processing task in the aforementioned applications and is often performed using Independent Component Analysis (ICA). Independent component analysis is one of the most extensively used signal processing algorithms for separating multi-dimensional random mixed signals captured from multiple sensor nodes into the independent signals. Single Channel Independent Component Analysis (SCICA) is used in order to to capture signals using just a single sensor, while still retaining information about the individual signals. In order to reduce the number of sensors required for capturing the signals to singlesensor while retaining the individual signal information, SCICA is used. Direct mapping of traditional signal processing algorithms like ICA and SCICA to hardware may not be suitable for the resource constrained and battery powered applications. Therefore, there is a necessity of low complex and low power designs for the signal processing algorithms, and this can be achieved using an algorithm-architecture holistic optimization approach.
SCICA involves multiple computationally intensive operations whose conventional implementations consume significant area and power on hardware. This thesis investigates the development of a resource constrained, algorithm-architecture holistic,
approach for novel implementation of SCICA and its sub-modules including ICA, KMeans Clustering, Gram-Schmidt Orthogonalization and low complex square root and divider. Designing SCICA based on Coordinate Rotation Digital Computer (CORDIC) will facilitate its deployment in various emerging resource constrained applications ranging from wireless sensor network to biomedical signal processing. To the best of our knowledge, this is the first attempt to take the SCICA algorithm to an architecture level. The proposed architecture for SCICA makes use of resource sharing by extensively reusing a single CORDIC unit to implement its various submodules for pre-processing, ICA, clustering and post-processing. FastICA is one of the most efficient algorithms among existing ones for ICA in terms of convergence speed. Hence, we further investigated a low complex yet accelerated solution using an algorithm-architecture holistic optimization approach for FastICA. In addition to that, vector cross product and CORDIC based accelerated approach for nD FastICA is proposed and implemented. Furthermore, an accelerated yet low complex architecture methodology for higher order nD FastICA is proposed by removing algorithmic redundancies in the existing FastICA algorithm and the same is implemented on both FPGA and ASIC platforms. CORDIC based architecture for K-Means Clustering is proposed leading to low complex and low power design. To reduce the complexity of Gram-Schmidt Orthogonalization which forms an integral part of FastICA, a CORDIC based architecture is developed. In addition, a low complex CORDIC based design methodology for Square root and division is designed and implemented. It is shown that these concepts facilitate the design of a novel SCICA architecture for resource constrained applications by significantly reducing the hardware complexity and power consumption. All the proposed methodologies reported in this thesis are corroborated using Matlab models and implemented on ASIC and FPGA platforms using Verilog HDL based designs. The entire design of SCICA is synthezised on UMC 90 nm technology using the Synopsys Design Compiler tool.
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