Design of feature extraction circuit for speech recognition applications

Saambhavi, V B and Rao, S S S P and P, Rajalakshmi (2012) Design of feature extraction circuit for speech recognition applications. In: IEEE 10th Conference: Sustainable Development Through Humanitarian Technology, 19-22, November 2012, Cebu; Philippines.

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Abstract

This paper presents a hardware-software co-design implementation of feature extraction circuit which can be used for speech recognition applications. Mel-frequency cepstral co-efficients are used to represent the features of the speech. A comparison between a complete software implementation and a co-design with both hardware and software components is brought out for the same circuit. The advantage of the hardware-software co-design is brought out by showing that the delay of execution has decreased to 0.0184 seconds from 17.29 seconds for the complete software implementation approach.The MicroBlaze soft-core processor from Xilinx is used in the hardware-software co-design. The processor frequency is chosen to be 66.67MHz. The Xilinx EDK software is used to design the circuit. The entire work is implemented on Atlys Spartan-6 development board.

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IITH Creators:

IITH Creators	ORCiD
P, Rajalakshmi	UNSPECIFIED

Item Type:

Conference or Workshop Item (Paper)

Uncontrolled Keywords:

Cepstral; Co-designs; Hardware and software components; Hardware software codesign; Microblaze; Soft-core processors; Software implementation; Spartan-6

Subjects:

Physics > Electricity and electronics

Divisions:

Department of Electrical Engineering

Depositing User:

Team Library

Date Deposited:

31 Oct 2014 08:44

Last Modified:

24 Aug 2015 07:06

URI:

http://raiithold.iith.ac.in/id/eprint/571