LOW POWER PERFORMANCE ADAPTIVE IoT RECEIVER FRONT ENDS

Regulagadda, S S (2019) LOW POWER PERFORMANCE ADAPTIVE IoT RECEIVER FRONT ENDS. PhD thesis, Indian institute of technology Hyderabad.

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Abstract

With the rapid growth in the technology, the application of wireless sensor networks (WSNs) for the internet of things (IoT) is increasing exponentially for smart cities, health-care and home automation, etc. The WSNs of IoT consist of a spatial distribution of autonomous short-range radios to monitor the environment and devices. These radios require low power receivers to work and sustain for several years. The design of a low power receiver for IoT applications is intensive research in both industry and academia. Over the past decade, Bluetooth Low Energy (BLE) and IEEE 802.15.4 (ZigBee) are the most popular standards for such kind of communication systems with relaxed interference tolerance. The Bluetooth version 5 (BT5) is more attractive with increased range and enhanced data rate. The 2.4 GHz ZigBee/BLE/BT5 compliant receiver is one of the attractive candidate for WSN applications with features like high data rate, and low power, etc. The current re-use technique is a promising solution in the realization of these modern low power receivers. This research work focuses on the design of low-power, fully on-chip, 2.4 GHz direct conversion receiver front ends for IoT applications in low-cost 180 nm complimentary metal oxide semiconductor (CMOS) process. Initially, we have designed a quadrature voltage controlled oscillator VCO (QVCO), low noise ampli�er (LNA), mixer and �ilter (overall called QLMVF) receiver front-end with split trans- conductance ampli�ers (TCAs) to operate in normal 1.8 V supply voltage. This-front end utilizes current-reuse technique in both radio frequency (RF) and base-band (BB) circuits and converts single-ended 2.4 GHz RF signal into di�erential BB signal with internal local oscillator (LO) signal generated by open loop QVCO. We have proposed the split TCAs to avoid I/Q cross-talk even with 50% duty cycle local oscillator (LO) signal which is the dominant problem in modern receivers. Two separate prototypes are fabricated on UMC 180 nm CMOS to verify the performance of individual building blocks and the integrated receiver. The measurement result with quad- at no-leads (QFN) packaged receiver shows 40 dB of conversion gain (CG), 10 dB of noise �gure (NF) with 2.7 mW of power consumption. Later, we have attempted to design a sub-mW receiver front end with direct back-gate coupled QVCO to operate at the scaled supply voltage (0.8 V). A passive AND gate mixer resolves the I/Q cross-talk problem and the proposed receiver front end is suitable for short-range energy harvesting IoT applications with low power and low voltage operation. The prototype did not reach the expectations due to the limitations of 180 nm technology node and unsymmetrical loading e�ect on the QVCO with test bu�ers. However, we have veri�ed the functionality of QVCO and behavior of input matching condition of the receiver under the sub-1 V supply. Finally, a performance adaptive re-con�gurable receiver front end designed with innovative cur- rent reuse LNA and TCAs to operate from 1.2 V to 1.5 V. Generation of proper biasing voltages is a challenging task with variable supply voltage, and it is more critical in current reuse architec- ture. A novel biasing scheme is adopted for both LNA and TCAs to operate variable supply voltage independent of process, voltage, and temperature (PVT) variations. The proposed re-con�gurable receiver front end operates in both low power and high-performance mode of operations for short range and high sensitive IoT applications respectively. The 1 mm2 receiver die, bonded on board, achieved 46 dB of CG with 4.4 dB of NF at high-performance mode. The receiver achieved 72% reduction in the power consumption at low power mode of operation. All the proposed receiver front ends are attractive for low power IoT applications at di�erent levels.

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