Low temperature, low pressure CMOS compatible Cu -Cu thermo-compression bonding with Ti passivation for 3D IC integration

Panigrahi, A K and Bonam, S and Ghosh, T and Vanjari, Siva Rama Krishna and Singh, Shiv Govind (2015) Low temperature, low pressure CMOS compatible Cu -Cu thermo-compression bonding with Ti passivation for 3D IC integration. In: 65th IEEE Electronic Components and Technology Conference (ECTC), 26-29 May, 2015, San Diego, CA, USA.

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Abstract

In this paper, we report the methodology of achieving low temperature, low pressure CMOS compatible Wafer-on-Wafer (WoW) Cu-Cu thermo-compression bonding using optimally chosen ultra-thin layer of Titanium (Ti) as a passivation layer. We systematically studied the effects of Ti thickness on bonding quality via its effects on surface roughness, oxidation prevention and inter diffusion of Cu. Through this study, we have found that a Ti thickness of 3 nm not only results in excellent bonding but also leads to a reduction in operating pressure to 2.5 bar and temperature to 175° C. The reduction in pressure is more than an order of magnitude lower relative to the current state-of-the-art. The lower operating pressure and temperature manifest themselves in a very good homogenous bond further highlighting the efficacy of our approach. Finally, our results have been corroborated by evidence from AFM study of the Cu/Ti surface prior to bonding. The bond strength of Cu-Cu as measured by Instron Microtester measurement system is found to be 190 MPa which compares very well with the reported literatures.

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IITH Creators:
IITH CreatorsORCiD
Vanjari, Siva Rama KrishnaUNSPECIFIED
Singh, Shiv Govindhttp://orcid.org/0000-0001-7319-879X
Item Type: Conference or Workshop Item (Paper)
Additional Information: Authors are also grateful for the support that they received fr om INUP program that is being carried out by Centre for Nanoscience and Engineering (CeNSE), Indian Institute of Science, Bangalore.
Uncontrolled Keywords: Electronic equipment; Flip chip devices; Passivation; Reduction; Surface roughness; Temperature; Three dimensional integrated circuits Low temperatures; Measurement system; Operating pressure; Oxidation prevention; Passivation layer; State of the art; Thermo compression bonding; Ultrathin layers
Subjects: Others > Electricity
Others > Engineering technology
Divisions: Department of Electrical Engineering
Depositing User: Team Library
Date Deposited: 12 Oct 2015 10:35
Last Modified: 16 Jan 2019 10:47
URI: http://raiithold.iith.ac.in/id/eprint/1971
Publisher URL: https://doi.org/10.1109/ECTC.2015.7159909
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