S, Nagaveni
(2014)
Multiband and Broadband impedance matching network.
Masters thesis, Indian Institute of Technology, Hyderabad.
Abstract
This thesis proposes parasitic aware design techniques for concurrent Multi-Band impedance matching networks. Different concurrent L-matching networks are analyzed and the substantial impact of component non-idealities on matching performance is addressed. To counter these impacts, the design methodology is modified and the improvement is verified for different concurrent dual-band networks. The same techniques are extended for quad band concurrent L-matching networks. The proposed parasitic aware methods are validated through practical components from Coilcraft and Murata libraries (offchip) and UMC 0.18_um RFCMOS technology (on-chip). The results show considerable improvement in both off-chip and onchip scenarios. Hence, the proposed method is much useful in low power concurrent multi band RF circuit design.
The new methodology for broadband impedance matching has been discussed. In this the cascaded Highpass and Lowpass LC sections are designed at lower cutoff and Higher cutoff frequencies respectively. Bandwidth can be changed for given reflection coefficient. From this methodology a flat band is obtained.
In this document ,the parasitic impact on broadband impedance matching network is analyzed. In narrow band impedance matching the component parasitic degrades the matching performance. The impact of parasitic are significant hence parasitic aware techniques are introduced to improve the performance in real environment. In broadband impedance matching , the impact of parasitics are analyzed for different topologies using real and imaginary impedance equations. The observation made from this analysis is that, the impact of parasitic on broadband impedance matching is not significant.
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