Device SHEs in the Presence of Non-equilibrium Channel Heat Transport in SOI and SOD FinFETs with Technology Scaling

Venkateswarlu, Sankatali and Nayak, Kaushik (2020) Device SHEs in the Presence of Non-equilibrium Channel Heat Transport in SOI and SOD FinFETs with Technology Scaling. In: 5th IEEE International Conference on Emerging Electronics, ICEE 2020, 26 November 2020through 28 November 2020, New Delhi.

Text
ICEE_2020.pdf - Published Version
Restricted to Registered users only
Download (597kB) | Request a copy

Abstract

With scaling FinFETs in advanced logic technologies, fin thickness, source/drain (S/D) regions doping and lattice hot-spot temperature predominantly affect the fin channel thermal conductivity due to enhanced phonon boundary scattering and phonon-dopant impurity (mass and size) fluctuations and leads to more device SHE. In this paper, we investigated these effects on silicon-on-insulator (SOI) fin field effect transistor (FinFET) electro-thermal performance by TCAD analysis considering Boltzmann transport equation (BTE) for phonons with relaxation time approximation. Results showed that the channel kth is reduced for $\mathrm{W}_{\text{Fin}} < 50\ \text{nm}$, doping $\mathrm{N} > 1\times 10^{19}\ \text{cm}-3$ and it is further degraded due to increasing local hot-spot temperature. However, Silicon-on-diamond (SOD) technology improves the device ET performance due to increase in heat energy flux through diamond (higher kth) BOX layer towards the substrate. Impact of within-chip ambient temperature $(\mathrm{T}_{\mathrm{A}})$ on device logic performance reveals that the SOD FinFET exhibits lower hot-spot temperature compared to conventional SOI FinFET. It is also revealed that with SOD technology, FinFETs can be aggressively scale down to sub-10nm node with better lattice heat mitigation, which improves the FinFET logic performance. © 2020 IEEE.

[error in script]

IITH Creators:

IITH Creators	ORCiD
Nayak, Kaushik	https://orcid.org/0000-0001-6583-264X

Item Type:

Conference or Workshop Item (Paper)

Additional Information:

ACKNOWLEDGMENT The authors would like to thank the members of Electron Devices Research (EDR) Lab, Electrical Engineering Department, IIT Hyderabad for useful discussions and feedback. This work was supported by Visvesvaraya PhD Scheme, Ministry of Electronics and Information Technology (MeitY), Govt. of India MEITY-PHD-856.

Uncontrolled Keywords:

ambient temperature; FinFET; logic performance; self-heating effect (SHE); SOD; SOI; thermal conductivity

Subjects:

Electrical Engineering

Divisions:

Department of Electrical Engineering

Depositing User:

. LibTrainee 2021

Date Deposited:

31 Oct 2022 05:13

Last Modified:

31 Oct 2022 05:13